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VLSISP
2008

Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class

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Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class
Abstract. In this paper we propose an architecture design methodology to optimize the throughput of MD4-based hash algorithms. The proposed methodology includes an iteration bound analysis of hash algorithms, which is the theoretical delay limit, and DFG (Data Flow Graph) transformations to achieve the iteration bound. We applied the methodology to some MD4-based hash algorithms such as SHA1, MD5 and RIPEMD-160. Since SHA1 is the algorithm which requires all the techniques we show, we also synthesized the transformed SHA1 algorithm in a 0.18
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
Added 16 Dec 2010
Updated 16 Dec 2010
Type Journal
Year 2008
Where VLSISP
Authors Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
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