Designing multi-socket systems using silicon photonics

Future single-board multi-socket systems may be unable to deliver the needed memory bandwidth electrically due to power limitations, which will hurt their ability to drive performance improvements. Energy efficient off-chip silicon photonics could be used to deliver the needed bandwidth, and it could be extended on-chip to create a relatively flat network topology. That flat network may make it possible to implement the same number of cores with a greater number of smaller dies for a cost advantage with negligible performance degradation. Categories and Subject Descriptors: B.4.3 [Computer Systems Organization]: Processor Architectures[Parallel Architectures] General Terms: Design, Economics, Performance

• Type: Conference
• Year: 2009
• Where: ICS
• Authors: Scott Beamer, Krste Asanovic, Christopher Batten, Ajay Joshi, Vladimir Stojanovic
• Keywords: ICS 2009, Negligible Performance Degradation, Single-board Multi-socket Systems, Theoretical Computer Science, flat Network