Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

16

FPL
1998
Springer

favoriteEmaildiscussreport

135views Hardware» more FPL 1998»

Designing for Xilinx XC6200 FPGAs

13 years 8 months ago

Designing for Xilinx XC6200 FPGAs

Download www.michael-herz.de

With the XC6200 FPGA Xilinx introduced the first commercially available FPGA designed for reconfigurable computing. It has a completely new internal architecture, so new design algorithms and software is needed. Due to the fact that most applications are in the research area, the number of sold units seems to be small. Because of this progress of design tools for this architecture is rather low. This paper discusses the problems, which appear during designing for the XC6200 FPGAs. A dedicated design flow is presented and demonstrated on an example application.

Reiner W. Hartenstein, Michael Herz, Frank Gilbert

Real-time Traffic

Available Fpga | FPGA Xilinx | FPL 1998 | Hardware | Reconfigurable Computing |

claim paper

Related Content

» Configuration Compression for the Xilinx XC6200 FPGA

» Checker Design for Online Testing of Xilinx FPGA Communication Protocols

» JPG A Partial Bitstream Generation Tool to Support Partial Reconfiguration in Virtex FPGA...

» Partial and Dynamically Reconfiguration of Xilinx VirtexII FPGAs

» An Alternate Wire Database for Xilinx FPGAs

» Implementation of the AES128 on Virtex5 FPGAs

» An efficient runtime router for connecting modules in FPGAS

» HighLevel Synthesis for FPGAs From Prototyping to Deployment

» PlaceandRoute Impact on the Security of DPL Designs in FPGAs

Post Info
More Details (n/a)

Added	05 Aug 2010
Updated	05 Aug 2010
Type	Conference
Year	1998
Where	FPL
Authors	Reiner W. Hartenstein, Michael Herz, Frank Gilbert

Comments (0)