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11

ITC
1998
IEEE

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Deterministic BIST with multiple scan chains

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Deterministic BIST with multiple scan chains

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A deterministic BIST scheme for circuits with multiple scan paths is presented. A procedure is described for synthesizing a pattern generator which stimulates all scan chains simultaneously and guarantees complete fault coverage. The new scheme may require less chip area than a classical LFSR-based approach while better or even complete fault coverage is obtained at the same time.

Gundolf Kiefer, Hans-Joachim Wunderlich

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Complete Fault Coverage | Deterministic Bist Scheme | Guarantees Complete Fault | Hardware | ITC 1998 |

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Added	05 Aug 2010
Updated	05 Aug 2010
Type	Conference
Year	1998
Where	ITC
Authors	Gundolf Kiefer, Hans-Joachim Wunderlich

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