DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits

Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Ebergen Sun Microsystems Laboratories Mountain View, CA Marly Roncken Intel Corporation Strategic CAD Labs Santa Clara, CA This paper addresses the problem of fault collapsing in asynchronous circuits. We investigate different transistor-level implementations of some basic elements that are used in delay-insensitive asynchronous circuit designs, and analyze them in the presence of single stuckat faults. From this analysis, we conclude that all internal stuck-at faults which are detectable by Boolean testing, epresented as pin-faults. This abstraction makes it possible to perform fault simulation at the logic level (network of basic elements) rather than at transistor level, which reduces the simulation time. We show how this fault model, called DUDES, can be used for fault collapsing to reduce the size of fault li...

• Type: Conference
• Year: 2000
• Where: ASYNC
• Authors: Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen, Marly Roncken
• Keywords: ASYNC 2000, Asynchronous Circuits, Fault Abstraction, Fault Simulation, Hardware