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AICCSA
2007
IEEE

Encoding Algorithms for Logic Synthesis

13 years 11 months ago
Encoding Algorithms for Logic Synthesis
This paper presents an encoding algorithm that is very efficient for many different logic synthesis problems. The algorithm is based on the use of special tables and includes two basic steps: searching for predefined graphical shapes in the tables, and swapping coded variables in the tables taking into account some constraints. The latter are specified with the aid of an auxiliary graph that reflects the overlap between coded variables in different subsets that have to be accommodated in the tables. The examples in the paper and the results of experiments have shown that the use of the proposed algorithm for state encoding allows the number of logic elements for combinational circuits of finite state machines to be decreased.
Valery Sklyarov, Iouliia Skliarova
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where AICCSA
Authors Valery Sklyarov, Iouliia Skliarova
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