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IJES
2007

Energy-aware compilation and hardware design for VLIW embedded systems

9 years 2 months ago
Energy-aware compilation and hardware design for VLIW embedded systems
Abstract: Tomorrow’s embedded devices need to run high-resolution multimedia applications which need an enormous computational complexity with a very low energy consumption constraint. In this context, the register file is one of the key sources of power consumption and its inappropriate design and management can severely affect the performance of the system. In this paper, we present a new approach to reduce the energy of the shared register file in upcoming embedded VLIW architectures with several processing units. Energy savings up to a 60% can be obtained in the register file without any performance penalty. It is based on a set of hardware extensions and a compiler-based energy-aware register assignement algorithm that enable the de/activation of parts of the register file (i.e. sub-banks) in an independent way at run-time, which can be easily included in these embedded architectures.
José L. Ayala, Marisa López-Vallejo,
Added 15 Dec 2010
Updated 15 Dec 2010
Type Journal
Year 2007
Where IJES
Authors José L. Ayala, Marisa López-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest
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