Sciweavers

Share
ISVLSI
2008
IEEE

Energy Recovery from High-Frequency Clocks Using DC-DC Converters

8 years 8 months ago
Energy Recovery from High-Frequency Clocks Using DC-DC Converters
Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large capacitor is wasted. Instead, the energy can be recovered using an on-chip DC-DC converter. This paper investigates the integration of two DC-DC converter topologies, boost and buck-boost, with a high-speed clock driver. The high operating frequency significantly shrinks the required size of the L and C components so they can be placed on-chip; typical converters place them off-chip. The clock driver and DC-DC converter are able to share the entire tapered buffer chain, including the widest drive transistors in the final stage. To achieve voltage regulation, the clock duty cycle must be modulated; implying only single-edge-triggered flops should be used. However, this minor drawback is eclipsed by the benefits: by recovering energy from the clock, the output power can actually exceed the additional power needed ...
Mehdi Alimadadi, Samad Sheikhaei, Guy Lemieux, Sha
Added 31 May 2010
Updated 31 May 2010
Type Conference
Year 2008
Where ISVLSI
Authors Mehdi Alimadadi, Samad Sheikhaei, Guy Lemieux, Shahriar Mirabbasi, William Dunford, Patrick Palmer
Comments (0)
books