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DATE
2003
IEEE

Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation

13 years 9 months ago
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an optimizing compiler, they do not succeed many a time due to limited knowledge of run-time data. In this paper we examine instruction reuse of integer ALU and load instructions in network processing applications. Specifically, this paper attempts to answer the following questions: (1) How much of instruction reuse is inherent in network processing applications?, (2) Can reuse be improved by reducing interference in the reuse buffer?, (3) What characteristics of network applications can be exploited to improve reuse?, and (4) What is the effect of reuse on resource contention and memory accesses? We propose an aggregation scheme that combines the high-level concept of network traffic i.e. ”flows” with a low level microarchitectural feature of programs i.e. repetition of instructions and data along with an ...
G. Surendra, Subhasis Banerjee, S. K. Nandy
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where DATE
Authors G. Surendra, Subhasis Banerjee, S. K. Nandy
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