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DSD
2007
IEEE

Error-Aware Design

13 years 4 months ago
Error-Aware Design
The universal underlying assumption made today is that Systems on chip must maintain 100% correctness regardless of the application. This work advocates the concept that some applications – by construction - are inherently error tolerant and therefore do not require this strict bound of 100 % correctness. In such cases, it is possible to exploit this tolerance by aggressively reducing the supply voltage, thereby reducing power consumption significantly. This approach is demonstrated on several case studies in imaging, video and wireless communication fields.
Fadi J. Kurdahi, Ahmed M. Eltawil, Amin Khajeh Dja
Added 07 Dec 2010
Updated 07 Dec 2010
Type Conference
Year 2007
Where DSD
Authors Fadi J. Kurdahi, Ahmed M. Eltawil, Amin Khajeh Djahromi, Mohammad A. Makhzan, Stanley Cheng
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