Exploring and predicting the architecture/optimising compiler co-design space

Embedded processor performance is dependent on both the underlying architecture and the compiler optimisations applied. However, designing both simultaneously is extremely difficult to achieve due to the time constraints designers must work under. Therefore, current methodology involves designing compiler and architecture in isolation, leading to sub-optimal performance of the final product. This paper develops a novel approach to this co-design space problem. For any microarchitectural configuration we automatically predict the performance that an optimising compiler would achieve without actually building it. Once trained, a single run of -O1 on the new architecture is enough

• Type: Conference
• Year: 2008
• Where: CASES
• Authors: Christophe Dubach, Timothy M. Jones, Michael F. P. O'Boyle
• Keywords: CASES 2008, Compiler, Compiler Optimisations, System Software, Time Constraints Designers