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TECS
2008

Fast exploration of bus-based communication architectures at the CCATB abstraction

13 years 3 months ago
Fast exploration of bus-based communication architectures at the CCATB abstraction
straction SUDEEP PASRICHA and NIKIL DUTT University of California, Irvine and MOHAMED BEN-ROMDHANE Newport Media Inc. Currently, system-on-chip (SoC) designs are becoming increasingly complex, with more and more components being integrated into a single SoC design. Communication between these components is increasingly dominating critical system paths and frequently becomes the source of performance bottlenecks. It, therefore, becomes imperative for designers to explore the communication space early in the design flow. Traditionally, system designers have used Pin-Accurate Bus Cycle Accurate (PA-BCA) models for early communication space exploration. These models capture all of the bus signals and strictly maintain cycle accuracy, which is useful for reliable performance exploration but results in slow simulation speeds for complex, designs, even when they are modeled using high-level languages. Recently, there have been several efforts to use the Transaction-Level Modeling (TLM) paradi...
Sudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane
Added 15 Dec 2010
Updated 15 Dec 2010
Type Journal
Year 2008
Where TECS
Authors Sudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane
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