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FPL
2003
Springer

Fast, Large-Scale String Match for a 10Gbps FPGA-Based Network Intrusion Detection System

13 years 8 months ago
Fast, Large-Scale String Match for a 10Gbps FPGA-Based Network Intrusion Detection System
Intrusion Detection Systems such as Snort scan incoming packets for evidence of security threats. The most computation-intensive part of these systems is a text search against hundreds of patterns, and must be performed at wire-speed. FPGAs are particularly well suited for this task and several such systems have been proposed. In this paper we expand on previous work, in order to achieve and exceed a processing bandwidth of 11Gbps. We employ a scalable, low-latency architecture, and use extensive fine-grain pipelining to tackle the fan-out, match, and encode bottlenecks and achieve operating frequencies in excess of 340MHz for fast Virtex devices. To increase throughput, we use multiple comparators and allow for parallel matching of multiple search strings. We evaluate the area and latency cost of our approach and find that the match cost per search pattern character is between 4 and 5 logic cells.
Ioannis Sourdis, Dionisios N. Pnevmatikatos
Added 06 Jul 2010
Updated 06 Jul 2010
Type Conference
Year 2003
Where FPL
Authors Ioannis Sourdis, Dionisios N. Pnevmatikatos
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