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DAC
2009
ACM

Fault models for embedded-DRAM macros

14 years 4 months ago
Fault models for embedded-DRAM macros
In this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first start from an standard SRAM test algorithm and discuss the faults which are not covered in the SRAM testing but should be considered in the DRAM testing. Then we study the behavior of those faults and the tests which can detect them. Also, we discuss how likely each modeled fault may occur on eDRAMs and commodity DRAMs, respectively. Categories and Subject Descriptors B.8.1 [Hardware]: Reliability, Testing, and Fault-Tolerance General Terms Design Keywords Memory testing, embedded DRAM
Ching-Yu Chin, Hao-Yu Yang, Mango Chia-Tso Chao, R
Added 12 Nov 2009
Updated 12 Nov 2009
Type Conference
Year 2009
Where DAC
Authors Ching-Yu Chin, Hao-Yu Yang, Mango Chia-Tso Chao, Rei-Fu Huang, Shih-Chin Lin
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