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ASPDAC
2005
ACM

Feasibility analysis of messages for on-chip networks using wormhole routing

13 years 6 months ago
Feasibility analysis of messages for on-chip networks using wormhole routing
—The feasibility of a message in a network concerns if its timing property can be satisfied without jeopardizing any messages already in the network to meet their timing properties. We present a novel feasibility analysis for real-time (RT) and nonrealtime (NT) messages in wormhole-routed networks on chip. For RT messages, we formulate a contention tree that captures contentions in the network. For coexisting RT and NT messages, we propose a simple bandwidth partitioning method that allows us to analyze their feasibility independently.
Zhonghai Lu, Axel Jantsch, Ingo Sander
Added 13 Oct 2010
Updated 13 Oct 2010
Type Conference
Year 2005
Where ASPDAC
Authors Zhonghai Lu, Axel Jantsch, Ingo Sander
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