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ICCAD
2005
IEEE

FinFETs for nanoscale CMOS digital integrated circuits

10 years 5 months ago
FinFETs for nanoscale CMOS digital integrated circuits
Suppression of leakage current and reduction in device-todevice variability will be key challenges for sub-45nm CMOS technologies. Non-classical transistor structures such as the FinFET will likely be necessary to meet transistor performance requirements in the sub-20nm gate length regime. This paper presents an overview of FinFET technology and describes how it can be used to improve the performance, standby power consumption, and variability in nanoscale-CMOS digital ICs. Keywords MOSFET, thin-body transistor, CMOS, SRAM, digital IC
Tsu-Jae King
Added 24 Jun 2010
Updated 24 Jun 2010
Type Conference
Year 2005
Where ICCAD
Authors Tsu-Jae King
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