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2004
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Fingerprinting: bounding soft-error detection latency and bandwidth

11 years 6 months ago
Fingerprinting: bounding soft-error detection latency and bandwidth
Recent studies have suggested that the soft-error rate in microprocessor logic will become a reliability concern by 2010. This paper proposes an efficient error detection technique, called fingerprinting, that detects differences in execution across a dual modular redundant (DMR) processor pair. Fingerprinting summarizes a processor’s execution history in a hash-based signature; differences between two mirrored processors are exposed by comparing their fingerprints. Fingerprinting tightly bounds detection latency and greatly reduces the interprocessor communication bandwidth required for checking. This paper presents a study that evaluates fingerprinting against a range of current approaches to error detection. The result of this study shows that fingerprinting is the only error detection mechanism that simultaneously allows high-error coverage, low error detection bandwidth, and high I/O performance. Categories and Subject Descriptors C.4 [Performance of Systems]: Reliability...
Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Baba
Added 30 Jun 2010
Updated 30 Jun 2010
Type Conference
Year 2004
Where ASPLOS
Authors Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Babak Falsafi, James C. Hoe, Andreas Nowatzyk
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