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ISMVL
2010
IEEE

Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs

13 years 8 months ago
Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs
This paper proposes a new architecture for memorybased floating-point numeric function generators (NFGs). The design method uses piecewise-split edge-valued multivalued decision diagrams (EVMDDs). To design NFGs with less memory size, we partition the domain of the floatingpoint function into segments, and represent the function using an EVMDD for each segment. By realizing each EVMDD with hardware, we obtain the floating-point NFG. This paper also presents an algorithm that partitions the domain by decomposing the edge-valued binary decision diagram (EVBDD) representing the whole floating-point function. Experimental results show that, for a single-precision floating-point function, our new NFG requires 40% to 65% less memory than any previous one for generic function.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Added 18 Jul 2010
Updated 18 Jul 2010
Type Conference
Year 2010
Where ISMVL
Authors Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
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