A Formal Description of VHDL-AMS Analogue Systems

A formal definition of the general VHDLAMS analogue system has been proposed to relate the way in which the language affects the specification of a non-linear discontinuous analogue system. It has been suggested to model the break set as a separate system in order to facilitate the interaction between the analogue equation set and tal abstract machine. The significance of the proposed model is that it may be used in semantic validation of VHDL-AMS description and may also facilitate mixed-signal equation formulation for an underlying VHDL-AMS simulator.

• Type: Conference
• Year: 1998
• Where: DATE
• Authors: Tom J. Kazmierski
• Keywords: Analogue Equation, DATE 1998, Hardware, Mixed-signal Equation Formulation, Non-linear Discontinuous Analogue