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2000
Springer

FPGA Implementation of a Prototype WDM On-Line Scheduler

12 years 5 months ago
FPGA Implementation of a Prototype WDM On-Line Scheduler
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling technique, Multiple-Messagesper-Node with Shortest Job First priority (MMN-SJF), has been proposed to tackle these two areas simultaneously and offers a globally optimizing approach to scheduling. In this paper, a reconfigurable testbed consisting of several interconnected FPGAs for analyzing such scheduling algorithms is introduced and in particular, a prototype scheduler is developed to investigate the implementation and hardware complexity associated with MMN-SJF. We find that the MMN-SJF scheduling technique can be implemented cost effectively and with only simple logic blocks.
Winnie W. Cheng, Steven J. E. Wilton, Babak Hamidz
Added 24 Aug 2010
Updated 24 Aug 2010
Type Conference
Year 2000
Where FPL
Authors Winnie W. Cheng, Steven J. E. Wilton, Babak Hamidzadeh
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