A generic lookup cache architecture for network processing applications

Abstract-- In this paper, we introduce a novel architecture for constructing caches for lookup operations that are used in a variety of network processing applications. The distinguishing feature of the cache is the ability to match on keys that of arbitrary lengths. We show through an FPGA implementation, that the proposed design can speed up lookup operations significantly compared to a software implementation. In conjunction with a network processor, the use of such a cache can greatly improve the response time of lookup intensive applications such as DNS resolution, directory lookup in network storage, and LDAP queries.

• Type: Conference
• Year: 2006
• Where: FPGA
• Authors: Janardhan Singaraju, John A. Chandy
• Keywords: FPGA, FPGA 2006, Lookup Intensive Applications, Lookup Operations, Network Processing Applications