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Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array

9 years 8 months ago
Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array
This paper describes a hardware architecture for modular multiplication operation which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptography (PKC) i.e. ECC and RSA Cryptosystems. The challenge of current PKC implementations is to deal with long numbers (160-2048 bits) in order to achieve system’s efficiency, as well as security. RSA, still the most popular PKC, has at its root the modular exponentiation operation. Modular exponentiation consists of repeated modular multiplications, which is also the basic operation for ECC protocols. The solution proposed in this work uses a systolic array implementation and can be used for arbitrary precisions. We also present modular exponentiation based on the Montgomery’s Multiplication Method (MMM).
Siddika Berna Örs, Lejla Batina, Bart Preneel
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where IPPS
Authors Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle
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