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2015
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Hardware Task Scheduling for Partially Reconfigurable FPGAs

4 years 6 months ago
Hardware Task Scheduling for Partially Reconfigurable FPGAs
—Partial reconfiguration (PR) of FPGAs can dynamically extend and adapt the functionality of computing systems by swapping in and out HW tasks. To coordinate the ondemand task execution, we propose, implement and validate a practical run time system manager (RTSM) for scheduling SW tasks on available processor(s) and HW tasks on any number of reconfigurable regions of a partially reconfigurable FPGA. Our approach is a practical one, in the sense that we take into account all the technology restrictions imposed by the FPGA vendor. The RTSM is fed with the initial partitioning of the application into tasks, the corresponding task graph, and the available task mappings, and reacts according to dynamic parameters such as the runtime status of each task and region, e.g. busy executing, idle, scheduled for reconfiguration/execution task, free, reconfigured, active region etc. The RTSM employs a task reuse policy to minimize reconfigurations, moves tasks among regions to manage efficiently ...
George Charitopoulos, Iosif Koidis, Kyprianos Papa
Added 16 Apr 2016
Updated 16 Apr 2016
Type Journal
Year 2015
Where ARC
Authors George Charitopoulos, Iosif Koidis, Kyprianos Papadimitriou, Dionisios N. Pnevmatikatos
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