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ASPDAC
2004
ACM

Hierarchical random-walk algorithms for power grid analysis

13 years 9 months ago
Hierarchical random-walk algorithms for power grid analysis
Abstract— This paper presents a power grid analyzer that combines a divide-and-conquer strategy with a random-walk engine. A single-level hierarchical method is first described and then extended to multi-level and “virtual-layer” hierarchy. Experimental results show that these algorithms not only achieve speedups over generic random-walk method, but also are more robust in solving various types of industrial circuits. For example, a 71K-node circuit is solved in 4.16 seconds, showing a more than 4 times speedup over the generic method; a 348K-node wirebond power grid, for which the performance of the generic method degrades, is solved in 75.88 seconds.
Haifeng Qian, Sachin S. Sapatnekar
Added 30 Jun 2010
Updated 30 Jun 2010
Type Conference
Year 2004
Where ASPDAC
Authors Haifeng Qian, Sachin S. Sapatnekar
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