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ISCAS
2007
IEEE

A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement

9 years 5 months ago
A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement
Abstract—This paper presents a high-speed digital feedforward Delta-Sigma Modulator which relaxes timing requirement for the Dynamic Element Matching (DEM) algorithm. By making the main Digital to Analog Converter (DAC) process a small part of the input signal, the distortion from the DAC is suppressed. The proposed method allows eliminating the DEM circuitry in the critical data path for high-speed applications, thus achieving high-resolution without augmenting considerable silicon area. Analysis and simulation results verify the effectiveness of the proposed method.
Sunwoo Kwon, Un-Ku Moon
Added 04 Jun 2010
Updated 04 Jun 2010
Type Conference
Year 2007
Where ISCAS
Authors Sunwoo Kwon, Un-Ku Moon
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