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DAC
1996
ACM

iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips

10 years 7 days ago
iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips
In this paper, we present the rst chip-level electrothermal simulator, iCET. For a given chip layout, packaging material, user-speci ed input signal patterns, and thermal boundary conditions, it automatically nds the CMOS on-chip steadystate temperature pro le and the resulting circuit performance. iCET has been tested on several circuits and it can eciently analyze layouts containing tens of thousands of transistors on a desktop workstation.
Yi-Kan Cheng, Chin-Chi Teng, Abhijit Dharchoudhury
Added 08 Aug 2010
Updated 08 Aug 2010
Type Conference
Year 1996
Where DAC
Authors Yi-Kan Cheng, Chin-Chi Teng, Abhijit Dharchoudhury, Elyse Rosenbaum, Sung-Mo Kang
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