Implementation of Multiple-Output Functions Using PQMDDs

A sequential realization of multiple-output logic functions is presented. A conventional sequential realization is based on SBDDs (Shared reduced ordered Binary Decision Diagrams). In this paper, we propose PQMDD (Paged Quasi-reduced ordered Multi-valued Decision Diagram) as a new data structure. A function is represented by a PQMDD, and stored in memory. Dedicated control circuits traverse the PQMDD in parallel. We represent multiple-output function for benchmark functions by SBDDs and PQMDDs and compare the size of memory and computation time. Keywords { multiple-output logic function, BDD, MDD, PMDD, PQMDD.

• Type: Conference
• Year: 2000
• Where: ISMVL
• Authors: Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura
• Keywords: Decision Diagram, Hardware, ISMVL 2000, Multiple-output Logic Function, Sequential Realization