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MEMICS
2010

Instructor Selector Generation from Architecture Description

8 years 6 months ago
Instructor Selector Generation from Architecture Description
We describe an automated way to generate data for a practical LLVM instruction selector based on machine-generated description of the target architecture at register transfer level. The generated instruction selector can handle arbitrarily complex machine instructions with no internal control flow, and can automatically find and take advantage of arithmetic properties of an instructions, specialized pseudo-registers and special cases of immediate operands. Digital Object Identifier 10.4230/OASIcs.MEMICS.2010.109
Miloslav Trmac, Adam Husar, Jan Hranac, Tomas Hrus
Added 20 May 2011
Updated 20 May 2011
Type Journal
Year 2010
Where MEMICS
Authors Miloslav Trmac, Adam Husar, Jan Hranac, Tomas Hruska, Karel Masarik
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