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DATE
2006
IEEE

An integrated open framework for heterogeneous MPSoC design space exploration

10 years 4 months ago
An integrated open framework for heterogeneous MPSoC design space exploration
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs) stand out as one of the most efficient design paradigms and could be especially effective as SoC computing engines. However, multiple hurdles which are hindering the productivity of SoC designers and researchers must be solved first. Among them, the difficulty of thoroughly exploring the design space by simultaneously sweeping axes like processing elements, memory hierarchies and chip interconnect fabrics. We tackle this challenge by proposing an integrated approach where state-of-the-art platform modeling infrastructures, at the IP core level and at the system level, meet to provide the designer with maximum openness and flexibility in terms of design space exploration. 1
Federico Angiolini, Jianjiang Ceng, Rainer Leupers
Added 10 Jun 2010
Updated 10 Jun 2010
Type Conference
Year 2006
Where DATE
Authors Federico Angiolini, Jianjiang Ceng, Rainer Leupers, Federico Ferrari, Cesare Ferri, Luca Benini
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