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1999
IEEE

Interconnect Optimization Strategies for High-Performance VLSI Designs

9 years 1 months ago
Interconnect Optimization Strategies for High-Performance VLSI Designs
Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater insertion in interconnects is an increasinglyimportantelementin the physicaldesignofhigh-performance VLSI systems. By interconnect tuning, we refer to the selection of line thicknesses, widths and spacings in multi-layer interconnect to simultaneously optimize signal distribution, signal performance, signal integrity, and interconnect manufacturability and reliability. This is a key activity in most leading-edge design projects, but has received little attention in the literature. Our work provides the first technology-specific studiesofinterconnecttuning in the literature. We centeron globalwiring layers and interconnect tuning issues related to bus routing, repeater insertion, and choice of shielding/spacing rules for signal integrity and performance. We address four basic questions. (1) How should width and...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto
Added 04 Aug 2010
Updated 04 Aug 2010
Type Conference
Year 1999
Where VLSID
Authors Andrew B. Kahng, Sudhakar Muddu, Egino Sarto
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