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2004
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Interconnect-power dissipation in a microprocessor

10 years 9 months ago
Interconnect-power dissipation in a microprocessor
Interconnect power is dynamic power dissipation due to switching of interconnection capacitances. This paper describes the characterization of interconnect power in a state-of-the-art high-performance microprocessor designed for power efficiency. The analysis showed that interconnect power is over 50% of the dynamic power. Over 90% of the interconnect power is consumed by only 10% of the interconnections. Relations of interconnect power to wire length distribution and hierarchy level of nets were examined. In light of the results, a router’s algorithms were modified, to use larger wire spacing and minimal length routing for the high power consuming interconnects. The power-aware router algorithm was tested on synthesized blocks, demonstrating average saving of 14% in the dynamic power consumption without timing degradation or area increase. The results demonstrate the obtainable benefits of tuning physical design algorithms to save power. Categories and Subject Descriptors B.7.1 [In...
Nir Magen, Avinoam Kolodny, Uri C. Weiser, Nachum
Added 30 Jun 2010
Updated 30 Jun 2010
Type Conference
Year 2004
Where SLIP
Authors Nir Magen, Avinoam Kolodny, Uri C. Weiser, Nachum Shamir
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