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11

PRDC
2002
IEEE

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Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method

13 years 9 months ago

Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method

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Tomoya Kitai, Yusuke Oguro, Tomohiro Yoneda, Eric

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Applied Computing | PRDC 2002 |

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Added	15 Jul 2010
Updated	15 Jul 2010
Type	Conference
Year	2002
Where	PRDC
Authors	Tomoya Kitai, Yusuke Oguro, Tomohiro Yoneda, Eric Mercer, Chris J. Myers

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