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ARITH
2005
IEEE

Low Latency Pipelined Circular CORDIC

13 years 10 months ago
Low Latency Pipelined Circular CORDIC
The pipelined CORDIC with linear approximation to rotation has been proposed to achieve reductions in delay, power and area; however, the schemes for rotation (multiplication) and vectoring (division) complicate implementation in a single unit. In this work, we improve the linear approximation scheme, leading to a unified implementation for rotation and vectoring where fully parallel tree multipliers are used instead of the second half of CORDIC iterations. We also combine the linear approximation to rotation with the scale factor compensation so that the compensation is performed concurrently with the rotation process. Comparison with other designs is also provided.
Elisardo Antelo, Julio Villalba
Added 24 Jun 2010
Updated 24 Jun 2010
Type Conference
Year 2005
Where ARITH
Authors Elisardo Antelo, Julio Villalba
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