A Low Noise and Low Power CMOS Image Sensor with Pixel-level Correlated Double Sampling

—A Low noise and low power CMOS Image Sensor (CIS) with pixel-level Correlated Double Sampling (CDS) is proposed. As the pixel readout circuit using source follower is major readout noise and power consumption source in the conventional CIS structure, the proposed new structure removes the source follower and performs pixel-level CDS and comparing. The proposed CIS is integrated with 240×180 pixel array. A pixel fill factor is 32% and its pitch is 8.4µm. The test chip was fabricated with CMOS 0.35-µm process and its power consumption is 18 mW with 3.3 V occupying 8.1 mm2

• Type: Conference
• Year: 2007
• Where: DDECS
• Authors: Dongsoo Kim, Gunhee Han
• Keywords: DDECS 2007, Hardware, Pixel Readout Circuit, Source Follower, —a Low Noise