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ISCAS
2007
IEEE

Low-Power Circuits for Brain-Machine Interfaces

9 years 5 months ago
Low-Power Circuits for Brain-Machine Interfaces
—This paper presents work on ultra-low-power circuits for brain–machine interfaces with applications for paralysis prosthetics, stroke, Parkinson’s disease, epilepsy, prosthetics for the blind, and experimental neuroscience systems. The circuits include a micropower neural amplifier with adaptive power biasing for use in multi-electrode arrays; an analog linear decoding and learning architecture for data compression; low-power radio-frequency (RF) impedance-modulation circuits for data telemetry that minimize power consumption of implanted systems in the body; a wireless link for efficient power transfer; mixed-signal system integration for efficiency, robustness, and programmability; and circuits for wireless stimulation of neurons with power-conserving sleep modes and awake modes. Experimental results from chips that have stimulated and recorded from neurons in the zebra finch brain and results from RF power-link, RF data-link, electrode-recording and electrode-stimulating ...
Rahul Sarpeshkar, Woradorn Wattanapanitch, Benjami
Added 04 Jun 2010
Updated 04 Jun 2010
Type Conference
Year 2007
Where ISCAS
Authors Rahul Sarpeshkar, Woradorn Wattanapanitch, Benjamin I. Rapoport, Scott K. Arfin, Michael W. Baker, Soumyajit Mandal, Michale S. Fee, Sam Musallam, Richard A. Andersen
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