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ISCAS
1999
IEEE

A low-power switched-current algorithmic A/D converter

10 years 5 months ago
A low-power switched-current algorithmic A/D converter
This paper reports the development of a low-power switchedcurrent algorithmic A/D converter based on a new algorithm, providing the bit conversion in three-cycles. The converter uses modified S2 I type current copiers to reduce the overall area and power consumption. The analog portion of the converter occupies only 0.35mm2 area in 3
A. Tezel, T. Akin
Added 03 Aug 2010
Updated 03 Aug 2010
Type Conference
Year 1999
Where ISCAS
Authors A. Tezel, T. Akin
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