Low-power technology mapping for FPGA architectures with dual supply voltages

In this paper we study the technology mapping problem of FPGA architectures with dual supply voltages (Vdds) for power optimization. This is done with the guarantee that the mapping depth of the circuit will not increase compared to the circuit with a single Vdd. We first design a single-Vdd mapping algorithm that achieves better power results than the latest published lowpower mapping algorithms. We then show that our dual-Vdd mapping algorithm can further improve power savings by up to

• Type: Conference
• Year: 2004
• Where: FPGA
• Authors: Deming Chen, Jason Cong, Fei Li, Lei He
• Keywords: FPGA 2004, Hardware, Mapping Algorithm, Single-Vdd Mapping Algorithm, Technology Mapping Problem