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2008
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Memory Architecture Exploration Framework for Cache Based Embedded SOC

10 years 2 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences crtical system design objectives like area, power and performance. Hence the embedded system designer performs a complete memory architecture exploration to custom design a memory architecture for a given set of applications. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of exhaustive-search based memory exploration at the outer level and a two step based integrated data layout for SPRAM-Cache based architectures at the inner level. We present a two step integrat...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj
Added 30 Nov 2009
Updated 30 Nov 2009
Type Conference
Year 2008
Where VLSID
Authors T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan
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