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10

DAC
1994
ACM

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116views Computer Architecture» more DAC 1994»

Minimal Delay Interconnect Design Using Alphabetic Trees

13 years 8 months ago

Minimal Delay Interconnect Design Using Alphabetic Trees

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Abstract - We propose a new algorithm for the performancedriven interconnect design problem, based on alphabetic trees. The interconnect topology is determined in a global manner and does not greedily add edges as in conventional approaches. The algorithm can handle cases where the sink capacitances are different. Good results are obtained while running two to sixty times faster than three existing algorithms on practical instances.

Ashok Vittal, Malgorzata Marek-Sadowska

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Algorithms | Computer Architecture | DAC 1994 | Interconnect Design Problem | Interconnect Topology |

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Added	09 Aug 2010
Updated	09 Aug 2010
Type	Conference
Year	1994
Where	DAC
Authors	Ashok Vittal, Malgorzata Marek-Sadowska

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