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CODES
1996
IEEE

A Model for the Coanalysis of Hardware and Software Architectures

13 years 9 months ago
A Model for the Coanalysis of Hardware and Software Architectures
Successful """tiprocessor system design for complex realtime embedded applications requires powerful and comprehensive. yet cost-effective. productive. and maintainable modeling. The """ti-disciplinary. VHDL-based modeling library developed by the Honeywell Technology Center places heavy emphasis on multiprocessing and distributed communications. These models focus on detailed hardware performance analysis along with multiple abstraction levels for software representation and evaluation. This paper will detail the processor model which provides the key element for the coanalysis of hardware and software system architectures.
Fred Rose, Todd Carpenter, Sanjaya Kumar, John Sha
Added 07 Aug 2010
Updated 07 Aug 2010
Type Conference
Year 1996
Where CODES
Authors Fred Rose, Todd Carpenter, Sanjaya Kumar, John Shackleton, Todd Steeves Honeywell
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