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ISQED
2010
IEEE

Modeling and verification of industrial flash memories

13 years 6 months ago
Modeling and verification of industrial flash memories
We present a method to abstract, formalize, and verify industrial flash memory implementations. Flash memories contain specialized transistors, e.g., floating gate and split gate devices, which preclude the use of tradiwitch-level abstractions for their verification. We nt this problem through behavioral abstractions, which allow formalization of the behaviors of the design acting state machines. Behavioral abstractions are agnostic to transistor type, making them suitable for formalizing flash memories. We have verified industrial flash memory implementations based on both floating gate and split gate technologies. Our work provides the first formal functional verification results for industrial flash memories. Keywords--equivalence checking, formal analysis, simulation, spice, theorem proving
Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronal
Added 13 Oct 2010
Updated 13 Oct 2010
Type Conference
Year 2010
Where ISQED
Authors Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronald Syzdek
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