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2010
IEEE

Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis

8 years 11 months ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible nature. However due to the tremendous amount of hardware resources available in these systems, new design methodologies and tools are required to reduce their design complexity. In this paper we present an exploratory analysis for specification of these systems, while utilizing the UML MARTE (Modeling and Analysis of Real-time and Embedded Systems) profile. Our contributions permit us to model fine grain reconfigurable FPGA based SoC architectures while extending the profile to integrate new features such as Partial Dynamic Reconfiguration supported by these modern systems. Finally we present the current limitations of the MARTE profile and ask some open questions regarding how these high level models can be effectively used as input for commercial FPGA simulation and synthesis tools. Solutions to these questions ...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea
Added 10 Feb 2011
Updated 10 Feb 2011
Type Journal
Year 2010
Where DSD
Authors Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jean-Luc Dekeyser
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