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1999
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The MorphoSys Dynamically Reconfigurable System-on-Chip

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The MorphoSys Dynamically Reconfigurable System-on-Chip
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reconfigurability and considerable depth of programmability. The first implementation of the MorphoSys architecture, the M1 chip, is currently at an advanced stage and it will operate at 100 MHz. Simulation results indicate significant performance improvements for different classes of applications, as compared to general-purpose processors. Keywords Reconfigurable computing, Adaptive computing, Parallel processing systems Submitted to The First NASA/DoD Workshop on Evolvable Hardware March, 1999
Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Ba
Added 03 Aug 2010
Updated 03 Aug 2010
Type Conference
Year 1999
Where EH
Authors Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Bagherzadeh, Fadi J. Kurdahi, Eliseu M. Chaves Filho, Vladimir Castro Alves
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