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ISCA
1998
IEEE

Multi-Level Texture Caching for 3D Graphics Hardware

11 years 9 months ago
Multi-Level Texture Caching for 3D Graphics Hardware
Traditional graphics hardware architectures implement what we call the push architecture for texture mapping. Local memory is dedicated to the accelerator for fast local retrieval of texture during rasterization, and the application is responsible for managing this memory. The push architecture has a bandwidth advantage, but disadvantages of limited texture capacity, escalation of accelerator memory requirements (and therefore cost), and poor memory utilization. The push architecture also requires the programmer to solve the binpacking problem of managing accelerator memory each frame. More recently graphics hardware on PC-class machines has moved to an implementation of what we call the pull architecture. Texture is stored in system memory and downloaded by the accelerator as needed. The pull architecture has advantages of texture capacity, stems the escalation of accelerator memory requirements, and has good memory utilization. It also frees the programmer from accelerator texture m...
Michael Cox, Narendra Bhandri, Michael Shantz
Added 05 Aug 2010
Updated 05 Aug 2010
Type Conference
Year 1998
Where ISCA
Authors Michael Cox, Narendra Bhandri, Michael Shantz
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