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DAC
2004
ACM

Multiple constant multiplication by time-multiplexed mapping of addition chains

10 years 3 days ago
Multiple constant multiplication by time-multiplexed mapping of addition chains
An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We propose a novel implementation of this circuit based on combining the addition chains of the constituent constants. We present an algorithm to automatically generate such a circuit for a given set of constants. The quality of the resulting circuits is evaluated after synthesis for a commercial 0.18?m standard cell library. We compare the area and latency efficiency of this addition chain based approach against a straightforward approach based on a constant table and a full multiplier. Categories and Subject Descriptors B.2.4 [High-Speed Arithmetic]: Cost/performance General Terms Algorithms, design Keywords Addition chains, multiplierless, directed acyclic graph, fusion
James C. Hoe, Markus Püschel, Peter Tummeltsh
Added 13 Nov 2009
Updated 13 Nov 2009
Type Conference
Year 2004
Where DAC
Authors James C. Hoe, Markus Püschel, Peter Tummeltshammer
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