Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
Sci2ools
International Keyboard
Graphical Social Symbols
CSS3 Style Generator
OCR
Web Page to Image
Web Page to PDF
Merge PDF
Split PDF
Latex Equation Editor
Extract Images from PDF
Convert JPEG to PS
Convert Latex to Word
Convert Word to PDF
Image Converter
PDF Converter
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
Free Online Productivity Tools
i2Speak
i2Symbol
i2OCR
iTex2Img
iWeb2Print
iWeb2Shot
i2Type
iPdf2Split
iPdf2Merge
i2Bopomofo
i2Arabic
i2Style
i2Image
i2PDF
iLatex2Rtf
Sci2ools
3
click to vote
ICCAD
2005
IEEE
favorite
Email
discuss
report
145
views
Hardware
»
more
ICCAD 2005
»
Noise margin analysis for dynamic logic circuits
14 years 15 days ago
Download
people.cs.ubc.ca
Suwen Yang, Mark R. Greenstreet
Real-time Traffic
Hardware
|
ICCAD 2005
|
claim paper
Related Content
»
Skewed CMOS NoiseImmune HighPerformance LowPower Static Circuit Family
»
Dynamic noise analysis in prechargeevaluate circuits
»
Dynamic Noise Margin Definitions and Model
»
ControlledLoad Limited Switch Dynamic Logic Circuit
»
Highspeed dynamic logic styles for scaleddown CMOS and MTCMOS technologies
»
Noise considerations in circuit optimization
»
Design Guidelines for MetallicCarbonNanotubeTolerant Digital Logic Circuits
»
Modeling Noise Transfer Characteristic of Dynamic Logic Gates
»
Eliminating False Positives in Crosstalk Noise Analysis
more »
Post Info
More Details (n/a)
Added
16 Mar 2010
Updated
16 Mar 2010
Type
Conference
Year
2005
Where
ICCAD
Authors
Suwen Yang, Mark R. Greenstreet
Comments
(0)
Researcher Info
Hardware Study Group
Computer Vision