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2009
IEEE

ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration

9 years 8 months ago
ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration
As industry moves towards many-core chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constraint, earlystage estimation of NoC power has become crucially important. ORION [29] was amongst the first NoC power models released, and has since been fairly widely used for early-stage power estimation of NoCs. However, when validated against recent NoC prototypes – the Intel 80-core Teraflops chip and the Intel Scalable Communications Core (SCC) chip – we saw significant deviation that can lead to erroneous NoC design choices. This prompted our development of ORION 2.0, an extensive enhancement of the original ORION models which includes completely new subcomponent power models, area models, as well as improved and updated technology models. Validation against the two Intel chips confirms a substantial improvement in accuracy over the original ORION. A case study with these power models plugged wit...
Andrew B. Kahng, Bin Li, Li-Shiuan Peh, Kambiz Sam
Added 20 May 2010
Updated 20 May 2010
Type Conference
Year 2009
Where DATE
Authors Andrew B. Kahng, Bin Li, Li-Shiuan Peh, Kambiz Samadi
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