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SASP
2009
IEEE

Parade: A versatile parallel architecture for accelerating pulse train clustering

10 years 1 months ago
Parade: A versatile parallel architecture for accelerating pulse train clustering
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas of signal processing applications, such as satellite communication. Most of these applications require the identification of the main characteristics of pulse-trains such as frequency. Previously suggested techniques for solving the clustering problem are restricted with several limiting assumptions. In contrast, Parade, based off a parallelized and improved version of the sequential search algorithm, solves the deinterleaving problem significantly faster and in a more general case by considering all conditions such as jitter, dropped pulses, arbitrary start and end points. Our scheme employs several parameters, such as the number of deinterleaving modules and the number of memory elements, in order to achieve a desirable combination of accuracy, speed, memory usage and area. Using an 8-way parallel architect...
Amin Ansari, Dan Zhang, Scott A. Mahlke
Added 21 May 2010
Updated 21 May 2010
Type Conference
Year 2009
Where SASP
Authors Amin Ansari, Dan Zhang, Scott A. Mahlke
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