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ICCD
1996
IEEE

Pausible Clocking: A First Step Toward Heterogeneous Systems

10 years 2 months ago
Pausible Clocking: A First Step Toward Heterogeneous Systems
This paper describes a novel communication scheme, which is guaranteed to be free of synchronization failures, amongst multiple synchronous modules operating independently. In this scheme, communication between every pair of modules is done through an asynchronous FIFO channel; communicationbetween a module and the FIFO is done using a request/acknowledgehandshaking. Synchronization of handshaking signals to the local module clock is done in an unconventional way [17, 15, 3, 12, 5] -- the local clock built out of a ring oscillator is paused or stretched, if necessary, to ensure that the handshaking signal satisfies setup and hold time constraints with respect to the local clock. We constructed a test bed consisting of two synchronous modules with pausible clocking control and an asynchronous FIFO on a MOSIS 1:2mCMOS chip. The resulting system functions reliably up to the local clock frequency of 220MHz (according to SPICE simulation) -- the maximum clock rate is limited by the ring os...
Kenneth Y. Yun, Ryan P. Donohue
Added 07 Aug 2010
Updated 07 Aug 2010
Type Conference
Year 1996
Where ICCD
Authors Kenneth Y. Yun, Ryan P. Donohue
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