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ISQED
2003
IEEE

PDL: A New Physical Synthesis Methodology

10 years 3 months ago
PDL: A New Physical Synthesis Methodology
In this paper, we propose a new physical synthesis methodology, PDL, which relaxes the timing constraints to obtain best optimality in terms of layout quality and timing quality. It provides a common database for delay calculation, logic optimization, placement, and routing tools so that they can work and interact closely. We present results on industrial circuits showing the efficacy of this methodology.
Toshiyuki Shibuya, Rajeev Murgai, Tadashi Konno, K
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where ISQED
Authors Toshiyuki Shibuya, Rajeev Murgai, Tadashi Konno, Kazuhiro Emi, Kaoru Kawamura
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